4.0 Conclusions

Pico Systems has estimated a MTTF for its amorphous Si antifuse technology of at least 10⁶ (1 million) hours. The background for this estimate is provided in the technical bulletins which form Appendix B. Based upon the results of this evaluation, this claim is highly credible. The antifuse technology was subjected to a matrix of overstresses in a number of configurations that would not be found in any circuit application. Nonetheless, a user of the technology should make Pico Systems aware of any high current requirements, precision voltage, current, or resistance and/or impedance requirements. Since circuit layout responsibility resides with Pico Systems and not the user, the user is strongly advised to provide as much information as possible about dc and transient conditions in the circuits. Techniques such as parallel path routing, ratioing of resistances, and critical path analysis/routing can be used to offset the temperature coefficient of resistance (0.3%/Kelvin) variations inherent in a system utilizing aluminum metallization on silicon.

This evaluation demonstrated that the antifuse substrate technology is robust. The 25 C units were exposed to the 3 current levels for 8256 device-hours followed by 2256 device hours at the same current levels with the temperature raised to 85 C. Thus, over 10,000 device hours were accumulated while pulsing the devices with current levels up to 15X the manufacturer’s rated maximum current level.

Dormant periods and "laboratory-environment" storage had no deleterious effect on the units. The evaluation was interrupted a few times due to lack funding or equipment availability. The units were not hermetically sealed, nor were any special QA requirements imposed during manufacturing. A workmanship inspection and normal ESD precautions were followed by Pico Systems. No special handling was used by NASA during this evaluation.

The Pico Systems antifuse substrate technologies is acceptable for spaceflight usage.