Figure 1
Figure 2
PEC Photo
Among programmable technologies, antifuse-based programmable devices have existed for over 20 years. An antifuse is a passive structure which functions in the opposite manner to a fuse, i.e. in its off-state it presents an open circuit and by "blowing" the antifuse it goes to its on-state providing a conductive path. Antifuses have been used in PROM devices, Field Programmable Gate Arrays, and by Pico Systems (formerly Mosaic) as a wafer-scale level of programmable interconnection. In the Pico Systems implementation the technology is often referred as a programmable silicon circuit board. The fabrication technology is standard silicon integrated circuit fabrication processes.
Pico Systems developed the antifuse-based substrate technology for the manufacturing of Multi-chip Modules (MCM). Pico Systems’ technology relies on a sea of amorphous silicon antifuse to provide an interconnect structure on 4 metal (Al/Cu) layer silicon substrate. The product uses a combination of antifuses and vias (conductive path between 2 substrate layers) for interconnection between the 2 signals planes, power plane and the ground plane. The vias provide a series of fixed interconnections between the substrate surface and power plane, or, the substrate surface and ground plane. The antifuses provide a series of programmable interconnections for routing signals between devices using the two signal layers. Figure 1 depicts the interconnect concept. Figure 2 is a picture of MCM used in this evaluation.
Each antifuse substrate is programmed to provide the final interconnect. Programming involves exposure of antifuses to a pulse with sufficient energy to transform the antifuse from a high resistance state ( > 1 G Ohm) isolating the two signal layers to a low resistance state (1 Ohm) connecting the two signal layers. The result is analogous to a multilayer circuit board with 4 layers. Standard hybrid and MCM assembly techniques are used to create the final circuit. Semiconductor dice, resistors, capacitors, etc. are die attached to the surface. An array bond pad resources on the surface are used to wire bond the top layer of interconnection between die and substrate. A cross section of the antifuse can be found in Pico Systems Technical bulletin No. 3 Picostrate Reliability October 1996.
The reliability of the amorphous antifuse has been previously established.[1-5] In addition to the previous work, NASA/GSFC has performed an evaluation of the Pico Systems antifuse substrate technology. This particular product by Pico Systems has been used successfully in military and high reliability applications. The purpose of this evaluation was to stress the antifuses beyond their recommended operating limits without inducing failure mechanisms in the substrate metallization or the antifuse-metal contact. This approach is intended to separate the reliability of the antifuse from the other features of the substrate which have been extensively studied elsewhere.[6-10]